A memory slot of EEPROM type generally comprises a transistor having a floating gate allowing the storage of the data item, a drive gate, a source region and a drain region. Such a memory slot uses the principle of nonvolatile storage of charge on the floating gate of the transistor.
Conventionally, the operation or cycle for writing a data item comprises an erasure step followed by a programming step. Programming is achieved through the Fowler-Nordheim effect by using a voltage pulse having a high value, typically of the order of 13 to 15 volts, injecting electrons from the floating gate to the drain through the tunnel effect.
Erasure is also achieved through the Fowler-Nordheim effect, electrons being injected through the tunnel effect from the drain to the floating gate, and is also performed by using an erasure pulse similar to the programming pulse.
The programming and erasure pulses are customarily generated in the form of a ramp followed by a plateau, by pulse generators conventionally comprising one or more charge pump stages.
However, it is possible for the fan-out of the charge pump to be insufficient to attain the voltage levels necessary for the Fowler-Nordheim effect, in particular because of too low a supply voltage and because of current leakages. This translates into a writing error and an impairment of the data.
The current consumed during a write operation that the charge pump will have to provide can be expressed as a continuous component (DC) and a dynamic component (AC).
The continuous component of the consumed current originates essentially from the leakage currents internal to the transistors receiving the high voltage during the write operations, and if appropriate from the wells in which these transistors are positioned.
The dynamic component of the consumed current originates from the charge of the various parasitic capacitances originating from the hardware components and the interconnections receiving the high voltage during the write operations.
In practice, it is possible to express the current consumed by the charge pump according to equation (1):Ip=(Ic+Ctot·dV/dt)·(Vpp/Vdd)·1/Eff  (1)where Ip represents the consumed current, Ic the continuous component of this consumed current, Ctot the equivalent capacitance of the nodes of the circuit receiving the high voltage, dV/dt represents the slope of the ramp, Vpp represents the output high voltage, Vdd represents the supply voltage, and Eff represents the efficiency of the charge pump.
Operational needs exist in respect of memories of EEPROM type at low supply voltages, for example substantially 1.6 volts, in particular in “wireless” systems such as for example computer mice or keyboards, or hearing aid prostheses.
In practice, operations at low supply voltage Vdd often also require a low supply current. High consumptions of current Ip are therefore prejudicial to systems whose supply voltage is low.
Now, in accordance with equation (1), the current consumed is all the more sizable the larger the term Vpp/Vdd and therefore the lower the supply voltage Vdd.
Moreover, needs exist in respect of EEPROM type memory writing at high frequency, or short write time, for example substantially 1 ms per write cycle, in particular in high density memory systems.
Now, in accordance with equation (1), the current consumed is all the more sizable the larger the term dV/dt and therefore the shorter the write time provided.
Finally, it is often required that one and the same memory be capable of operating in a wide span of supply voltages, typically from 1.6 volts to 5.5 volts.
At present, pulse generators dimensioned to be reliable according to a short write time at low voltage, for example 1.6V, are consequently over-dimensioned when operating at high voltage, typically above 2.5 volts. They consequently require a sizable area and lack efficiency at high voltage while generating sizable, potentially detrimental, current spikes.